Memory Types Study Notes

A group of Memory chips, typically of the dynamic RAM (DRAM) type, which functions as the computer's primary workspace. The "random" in RAM means the contents of each byte can be directly accessed without regard to the bytes before or after it. Also true of other Types of Memory chips, including ROMs (Read Only Memory) and PROMs(Programable ROM). However, unlike ROMs (Read Only Memory) and PROMs(Programable ROM), RAM chips require power to maintain their content, which is why you must save your data onto disk before you turn the computer off.

Dynamic random access Memory (DRAM) is the most common kind of random access Memory (RAM) for personal computers and workstations. Memory is the network of electrically-charged points in which a computer stores quickly accessible data in the form of 0s and 1s. Random access means the PC processor can access any part of the Memory or data storage space directly rather than having to proceed sequentially from some starting place. DRAM is dynamic in that, unlike static RAM (SRAM), it needs to have its storage cells refreshed or given a new electronic charge every few milliseconds. Static RAM does not need refreshing because it operates on the principle of moving current which is switched in one of two directions rather than a storage cell which holds a charge in place. Static RAM is generally used for cache Memory, which can be accessed more quickly than DRAM.

Semiconductor-based Memory which contains instructions or data which can be read but not modified. (Generally, the term ROM often means any read-only device, as in CD-ROM for Compact Disk, Read Only Memory.) Once data has been written onto a ROM chip, it cannot be removed and can only be read. Unlike main Memory (RAM), ROM retains its contents even when the computer is turned off. ROM is referred to as being nonvolatile, whereas RAM is volatile. Most personal computers contain a small amount of ROM which stores critical programs such as the program which boots the computer. In addition, ROMs are used extensively in calculators and peripheral devices such as laser printers, whose fonts are often stored in ROMs.

Machines with flash BIOS capability use a special type of BIOS ROM called an EEPROM; which stands for "Electrically Erasable Programmable Read-Only Memory". As you can probably tell by the name, is a ROM which can be erased and re-written using a special program. Procedure is called flashing the BIOS and a BIOS that can do this is called a flash BIOS. The advantages of this capability are obvious; no need to open the case to pull the chip, and much lower cost. EEPROM is similar to flash mem. (sometimes called flash EEPROM). The principal difference is EEPROM requires data to be written or erased one byte at a time whereas flash mem. allows data to be written or erased in blocks. This makes flash mem. faster. Flash mem. works much faster than traditional EEPROMs because it writes data in chunks, usually 512 bytes in size, instead of a byte at a time.

As the first mass-produced Memory packages, these were 30 pin modules ~3.50" X 0.75", and were used primarily in 386, early 486, and Apple® computers. Designed as Fast-Page Mode non-Parity (2 or 8 chips per SIMM), or Parity (3 or 9 chips per SIMM), these were in 1Mb, 4Mb and 16Mb denominations. Installation must be in either 1 or 2 "banks" of either 2 or 4 matching SIMMs.
This design was soon replaced by 72 pin modules ~4.25" X 1.0", used primarily in later 486, 586 (Pentium®), and later Apple® models. Designed as Fast-Page Mode or EDO (explained later), these came as non-Parity or Parity with capacities of 4Mb, 8Mb, 16Mb, 32Mb, 64Mb and 128Mb. Most 486 and several Apple® machines only needed one SIMM per available socket, whereas Pentium® and PowerMacs® required matching pairs. Most machines required specific sizes and upgrade configurations.

As operating system Memory demands increased, larger Memory modules were required; yet the motherboard space was even more at a premium. To solve this problem the 168 pin DIMM module ~5.375" X 1" was developed.These are installed singly in later Pentium®s, Pentium® Pro's, and PowerMacs®, and are offered as non-Parity Fast-Page, EDO, ECC, or SDRAM modes, 3.3v or 5v. buffered or unbuffered, and 2-clock or 4-clock. Their capacities are 8Mb, 16Mb, 32Mb, 64Mb and 128Mb. Choosing the right module is very critical, as most machines require specific Types, sizes and upgrade configurations.
The number of black components on a 184-pin DIMM may vary, but they always have 92 pins on the front and 92 pins on the back for a total of 184. 184-pin DIMMs are approximately 5.375" long and 1.375" high, though the heights may vary. While 184-pin DIMMs and 168-pin DIMMs are approximately the same size, 184-pin DIMMs have only one notch within the row of pins.

Many brands of notebook computers use proprietary mem. modules, but several manufacturers use RAM based on the small outline dual in-line mem. module (SODIMM) configuration. SODIMM cards are small, about 2 inches by 1 inch (5 centimeters by 2.5 centimeters), and have 144 pins. Capacity ranges from 16MB to 256MB per module. An interesting fact about the Apple iMac desktop computer is it uses SODIMMs instead of the traditional DIMMs.

This style of Memory is primarily used in notebooks, and comes in two primary styles. "Credit cards" are proprietary designed modules which are often installed under the notebook keyboard. Most commonly, these are Non-Parity, however, choosing the right module is very critical, as most machines require specific Types, sizes and upgrade configurations. PCMCIA cards are a design standardized by industry OEMs. These come in three different Types, but Type I are used for Memory expansion.

PCMCIA (Personal Computer Memory Card International Association) is an international standards body and trade association with over 300 member companies which was founded in 1989 to establish standards for Integrated Circuit cards and to promote interchangeability among mobile computers where ruggedness, low power, and small size were critical. As the needs of mobile computer users has changed, so has the PC Card Standard. By 1991, PCMCIA had defined an I/O interface for the same 68 pin connector initially used by Memory cards. At the same time, the Socket Services Specification was added and was soon followed by the Card Services Specifcation as developers realized common software would be needed to enhance compatibility.

As data moves through your computer (e.g. from the CPU to the main Memory), the possibility of errors can occur . . . particularly in older 386 & 486 machines. Parity error detection was developed to notify the user of any data errors. By adding a single bit to each byte of data, this bit is responsible for checking the integrity of the other 8 bits while the byte is moved or stored. Once a single-bit error is detected, the user receives an error notification; however, parity checking only notifies, and does not correct a failed data bit. If your SIMM module has 3, 6, 9, 12, 18, or 36 chips then it is more than likely Parity.

Also known as Parity Generators, or Fake Parity, these modules were produced by some manufacturers as a less expensive alternative to True Parity. Fake parity modules "fool" your system into thinking parity checking is being done. This is accomplished by sending the parity signal the machine looks for, rather than using an actual parity bit. In a module using Fake Parity, you will NOT be notified of a Memory error, because it is really not being checked. The result of these undetected errors can be corrupted files, wrong calculations, and even corruption of your hard disk. If you need Parity modules be cautious of suppliers with bargain prices; they may be substituting useless Fake Parity.

These modules are just like Parity modules without the extra chips. There are no Parity chips in Apple® Computers, later 486, and most Pentium® class systems. The reason for this is simply because Memory errors are rare, and a single bit error will most likely be harmless.If your SIMM module has 2, 4, 8, 16, or 32 chips, then it is more than likely Non-Parity. Always match the new Memory with what is already in your system. To determine if your system requires parity, count the number of small, black, IC chips on one of your modules.

Error Correction Code modules are an advanced form of Parity detection often used in servers and critical data applications. ECC modules use multiple Parity bits per byte (usually 3) to detect double-bit errors. They also will correct single-bit errors without creating an error message. Some systems which support ECC can use a regular Parity module by using the Parity bits to make up the ECC code. However, a Parity system cannot use a true ECC module.

Fast Page Mode has traditionally been the most common DRAM. A "page" is the section of Memory available within a row address. Accessing Memory is like looking up information in a book. You choose the page, then FPM gets information from that page. FPM DRAMs need only to specify the row address once for accesses within the same page addresses. Successive accesses to the same page of Memory only require a column address to be selected, which saves time in accessing the Memory.

Extended Data Output DRAM is an improvement over FPM design, and used in Non-Parity configurations in Pentium® machines or higher. If supported by your motherboard, EDO shortens the Read cycle between the main Memory and the CPU, thereby dramatically increasing throughput. EDO chips allow the CPU to access Memory 10 to 20 percent faster. EDO DRAMs hold the data valid even after the signal which "strobes" the column address goes inactive. This allows faster CPU's to manage time more efficiently; i.e., while the EDO DRAM is retrieving an instruction for the microprocessor, the CPU can perform other tasks without concern that the data will become invalid. Do not use EDO in systems don't support it, or mix EDO with FPM as serious problems will result.

SDRAM is the fastest DRAM technology available. It uses a clock to synchronize the signal input and output. The clock coordinates with the CPU clock so both are in synch. The CPU "knows" when operations are to be completed and data will become available, freeing the processor for other operations. The use of a clock allows for extremely fast consecutive read and write capability over FPM and EDO DRAMs.The clock is the main speed consideration with SDRAMs; therefore, SDRAMs are measured in megahertz (e.g. 66 MHz or 100 MHz). SDRAM increases the speed and performance of the system.

Burst Extended Data Out DRAM (Burst EDO, BEDO) A variant on EDO DRAM in which read or write cycles are batched in bursts of four. The bursts wrap around on a four byte boundary which means only the two least significant bits of the CAS address get modified internally to produce each address of the burst sequence. Consequently, Burst EDO bus speeds will range from 40MHz to 66 MHz, well above the 33MHz bus speeds can be accomplished using Fast Page Mode or EDO DRAM. Burst EDO was introduced sometime before May 1995.

SRAM (Static RAM) stores its data in capacitors don't require constant recharging to retain their data; consequently, this type of RAM is faster than DRAM which results in a higher cost. Speed is approximately 8ns to 20ns - as opposed to 60ns to 80ns for DRAM.

Level 2 or L2 cache, mem. is external to the microprocessor. In general, L2 cache mem. (SRAM), also called the secondary cache, resides on a separate chip from the microprocessor. Although, more and more microprocessors are including L2 caches into their architectures.

The tag RAM used as part of the cache must normally be faster than the actual cache data store. This is because the tag RAM must be read first to check for a cache hit. We want to be able to check the tag and still have enough time to read the cache within a single clock cycle, if we have a hit. So for example, you may find that your system's main cache chips are 15 ns, while the tag may be 12 ns.

Pipelined Burst Static RAM (PB SRAM) has an access time in the range 4.5 to 8 nanoseconds (ns) and allows a transfer timing of 3-1-1-1 for bus speeds up to 133 MHz. These numbers refer to the number of clock cycles for each access of a burst mode mem. read. For example, 3-1-1-1 refers to three clock cycles for the first word and one cycle for each subsequent word.

PC100/PC133/PC150 SDRAM is synchronous DRAM (SDRAM) that states that it meets the PC100/PC133/PC150 specification from Intel®. Intel® created the specification to enable RAM manufacturers to make chips that would work with Intel®'s i440BX processor chipset. The i440BX was designed to achieve a 100 MHz/133 MHz system bus speed. Ideally, PC100/PC133/PC150 SDRAM would work at the 100 MHz/133 MHz speed, using a 4-1-1-1 access cycle. It's reported that PC100/PC133/PC150 SDRAM will improve performance by 10-15% in an Intel® Socket 7 system (but not in a Pentium® II because its L2 cache speed runs at only half of processor speed).
To develop this type of Memory, a set of specifications has been developed by Intel® and was endorsed by most of the Memory manufacturers. Intel® established a very precise set of specifications and guide lines to ensure compatibility between Memory modules of any brands. The Intel® PC100/PC133/PC150 compliance specifications are ensuring robust Memory operation from suppliers that meet these specifications and this is a great benefit to both the industry and the end users. In addition to Intel® providing specs for PC100/PC133/PC150 devices and DIMMs, Intel® has released module gerber (raw card) design files. Vendors using these raw card design files will have much more consistency than those using their own raw card design files

Many other alternate methods of Memory access are in development. One of the most promising is Double Data Rate (DDR) SDRAM. Like SDRAM before it, DDR SDRAM will interleave Memory access so that several Memory accesses can be performed simultaneously. DDR SDRAM executes twice for each tick of the Memory bus, effectively doubling the system bus speed. Currently, DDR Memory is only used in high-end graphics cards, but it will almost certainly make its way down to the main Memory of the computer soon.
Interleave: The process of taking data bits (singularly or in bursts) alternately from two or more mem. pages (on an SDRAM) or devices (on a mem. card or subsystem).

ESDRAM, made by Enhanced Memory Systems, includes a small static RAM (SRAM) in the SDRAM chip. This means that many accesses will be from the faster SRAM. In case the SRAM doesn't have the data, there is a wide bus between the SRAM and the SDRAM because they are on the same chip. ESDRAM is the synchronous version of Enhanced Memory System's EDRAM architecture. Both EDRAM and ESDRAM devices are in the category of cached DRAM and are used mainly for L2 cache Memory. ESDRAM is apparently competing with DDR SDRAM as a faster SDRAM chip for Socket 7 processors.

System Memory bandwidth is more important now than ever before. With the increase in processor performance, multimedia and 3D graphics, high bandwidth Memory is essential to sustain system performance. The transition to Rambus® DRAM (RDRAM®) - with a Memory performance gain up to 300% over the current SDRAM technology is nothing short of revolutionary!

nDRAM, 2000 by: Rambus® & Intel, Supports data transfer speeds up to 1,600MHz!
(More info when available)

(Synchronous Link DRAM) An enhanced version of the SDRAM Memory technology that uses a multiplexed bus to transfer data to and from the chips rather than fixed pin settings. SLDRAM is expected to support extremely fast transfer rates from 1.6 GBps up into the 3 GBps range. This is a protocol-based Memory technology like Rambus® DRAM, but is not a proprietary technology.
The "SL" originally stood for SyncLink®, which was dropped because it was a proprietary trade name of a company. In 1999, the SLDRAM consortium turned into AMI2 (Advanced Memory International, Inc.)to support the DDR SDRAM market.

SDRAM comes in either 2 clock and 4 clock versions. The difference between them is only on the PCB design of the modules. Both of these designs can use the same SDRAM chips, but the control signals and layouts of the module are different, and thus these two modules are not compatible with each other. The 4 clock design is more popular version, and has a faster response time than a 2 clock module; each clock signal can control 4 DRAM chips. (4 lines control up to 16 chips in groups of 4).

The speed rating marked on each chip (10ns, 50ns, 60ns, 70ns, 80ns or 100ns) signifies how long it takes for the read/write to occur. A chip with a lower number is usually better because it is faster; however, early systems often need slower speeds. If you are upgrading Memory in a computer, always match the speed of modules within the same bank.

Memory module is made up of electrical cells. The refresh process recharges these cells, which are arranged on the chips in rows. The refresh rate refers to the number of rows that must be refreshed. The common refresh rates are 1K, 2K, 4K and 8K. Some specialty designed DRAMs feature self refresh technology, which enables the components to refresh on their own - independent from the CPU or external consumption, and it is commonly used in notebook computers and laptop computer.

For best contact reliability, you should match the contact material of the SIMM sockets on your motherboard. Mixing metal Types may lead to contact corrosion, especially in high humidity environs. Visually inspect the sockets; if they are gold, buy SIMMs with gold contacts. If they are tin, buy SIMMs with tin/lead contacts. However, this is not always a critical issue, and either kind usually works. Most Pentium® boards have tin contacts, and almost all SIMMs manufactured today use a tin/lead alloy instead of gold.

   Virtual mem. provides applications with more mem. space than allocated in the computer. A technique which operating systems use to load more data into mem. than it can hold. Part of the data is kept on disk and is constantly swapped back and forth into system mem.. For instance, when your run a CD application.
    Whenever the operating system needs a part of mem. that is currently not in physical mem., a VIRTUAL MEMORY MANAGER picks a part of physical mem. that hasn't been used recently, writes it to a SWAP FILE on the hard disk and then reads the part of mem. that is needed from the swap file and stores it into real mem. in place of the old block. This is called SWAPPING. The blocks of mem. that are swapped around are called PAGES.
    Virtual mem. allows for the multitasking (opening more than one program) that we do.
    When the amount of virtual mem. in use greatly exceeds the amount of real mem., the operating system spends a lot of time swapping pages of mem. around, which greatly hampers performance. This called THRASHING and you can see it in your LED hard disk drive light. The hard disk is thousands of times slower than the system mem., if not more. A system that is thrashing can be perceived as either a very slow system or one that has come to a halt. Hard disk access time is measured in thousandths of a second; mem. access time is measured in billionth of a second.

The amount of mem. you need is determined by several factors; the software, operating system and the number of programs you want to have open at the same time. When you determine mem. needs, you'll also want to consider what your needs will be six months down the road. If you think you may be upgrading your operating system or adding more software, it's a good idea to factor that into the equation now.

Evolution of Memory
Year	Type	Volts	Freq	Timing
1968	RAM	5.0v	4.77MHz
1970	DRAM	+5v,-5v,+12v	4.77-40MHz	5-5-5-5
1971	ROM	3.3-5.0v
1974	MRAM	0.0v
1987	FPM DRAM	5.0v	16-66 MHz	5-3-3-3
1995	EDO DRAM	5.0v	33-75MHz	5-2-2-2
1995	BEDO DRAM	5.0v	60-100MHz	5-1-1-1
1996	SDRAM	3.3v	60-133MHz	5-1-1-1
1996	SLDRAM	3.3v	800MHz
1997	PC66	3.3v	66MHz	5-1-1-1
1998	PC100	3.3v	100MHz	4-1-1-1
1999	DRDRAM	2.5v	800MHz
1999	PC800 RDRAM	3.3v	800MHz
1999	PC133	3.3v	133MHz	2-2-2
2000	PC150	3.3v	133MHz	2-3-2
2000	DDR SDRAM	2.5v	266MHz	CL=2.5
2000	MicroDIMM	3.3v	100MHz	2,3
2001	EDRAM	1.2v	450MHz	15-35ns